The present document is based on Japanese Priority Document JP 2001-090292, filed in the Japanese Patent Office on Mar. 27, 2001, the entire contents of which being incorporated herein by reference.
1. Field of the Invention
The present invention relates to a semiconductor device and a wiring forming method in a semiconductor device and, more particularly to a semiconductor device in which a gap exists between wirings, and a wiring forming method in a semiconductor device.
2. Description of Related Art
In recent years, in a semiconductor device, multiple-layer wiring and miniaturization have been greatly advanced for the sake of higher performance. In a case of such a semiconductor device, as the miniaturization is advanced, parasitic capacitance between the wirings is increased, which leads to a serious problem for the development of a higher speed of a semiconductor device.
As a unit for reducing a drop in the parasitic capacitance, a technique of forming a gap between a plurality of wirings formed on a substrate is known (for convenience, it is referred to as a hollow wiring technique). The outline of an example of this hollow wiring technique will be described below with reference to sectional views of insulation layers of FIGS. 9A to 10B and the like, on the basis of a technique disclosed in Japanese Patent Application Laid-Open JP-A-Heisei, 2-240947.
[Process 10]
At first, a known transistor element (for example, MOS type FET) is formed on a semiconductor substrate. Then, a first insulation layer 110 is formed on the entire surface by using a CVD method. After that, for example, a lithography technique and a dry etching technique are used to form openings on the first insulation layer 110. Then, for example, a sputtering technique and the dry etching technique are used to fill wiring material into the opening. Also, first wirings 111 are formed on the first insulation layer 110. This situation is shown in FIGS. 9A and 9B. However, the illustrations of the semiconductor substrate, the transistor element and the openings are omitted in FIGS. 9A to 10B. Also, FIGS. 9A and 9C and FIG. 10A are the views when the first insulation layer 110 and the like are cut on a plane vertical to a direction orthogonal to a direction in which the first wiring 111 is extended, and FIGS. 9B and 9D and FIG. 10B are the views when the first insulation layer 110 and the like are cut on a plane vertical to a direction parallel to the direction in which the first wiring 111 is extended.
[Process-20]
After that, after a second insulation layer 112 is formed on the entire surface by using the CVD method, planarization is performed on a surface of the second insulation layer 112. Next, the lithography technique and the dry etching technique are used to form the openings on the second insulation layer 112 above the first wiring 111. Next, for example, the sputtering technique and the dry etching technique are used to fill the wiring material into the openings. Also, second wirings 113 are formed on the second insulation layer 112. This situation is shown in FIGS. 9C and 9D.
[Process-30]
Next, the second wiring 113 is used as an etching mask, and the second insulation layer 112 is etched. Accordingly, gaps 114 can be formed between the first wirings 111 and between the second wirings 113. This situation is shown in FIGS. 10A and 10B. After that, thin insulation layer is formed on the entire surface, and the wiring structure is completed.
Also, a semiconductor device having a structure in which the gap between a plurality of wirings formed on the substrate is vacuum is also well known.
Such a hollow wiring technique is effective means for dropping the parasitic capacitance between the wirings. However, since the gap is filled with air or it is vacuum, this results in a problem that the thermal diffusion in the gap is poor. That is, the heat generation when the semiconductor device is operated causes the wiring to be deformed or cut away, and also brings about drop in reliability and occurrence of a trouble in the semiconductor device.
Therefore, the present invention provides a semiconductor device, in which the problem such as the defect of the thermal diffusion in the hollow wiring technique can be solved, and a wiring formation method in a semiconductor device.
A semiconductor device of the present invention to solve the above-mentioned problem is characterized in that a gap is formed between wirings on a substrate, and the gap is filled with gas having a thermal conductivity equal to or higher than three times that of air at 0xc2x0 C.
By the way, in the following explanation, there may be a case where the gap, which is filled with the gas having the thermal conductivity (at 0xc2x0 C.) equal to or higher than three times the thermal conductivity (2.4xc3x9710xe2x88x922 W (mxe2x88x921) (Kxe2x88x921)) of the air at 0xc2x0 C. is filled between the wirings, is referred to as the wiring structure in the present invention. Also, there may be a case where the gas having the thermal conductivity (at 0xc2x0 C.) equal to or higher than three times that of the air at 0xc2x0 C. is referred to as a highly thermally conductive gas, for the convenience.
In the semiconductor device of the present invention, preferably, one or more gas impermeable films through which the highly thermally conductive gas cannot be permeated are formed on the wiring and above the gap. Or, preferably, the lamination structure comprised of one or more gas permeable films, through which the highly thermally conductive gas can be permeated, and the gas impermeable films, through which the highly thermally conductive gas cannot be permeated, are formed on the wiring and above the gap. Here, silicon nitride (SiN) can be exemplified as the material constituting the gas impermeable film. By the way, preferably, the gas impermeable film made of the silicon nitride is formed by a plasma CVD method in the condition that the formed gas impermeable film has a compression stress. Also, the material constituting the gas permeable film can include the material constituting the gas permeable film in the explanation of a wiring forming method in a semiconductor device according to a first or third embodiment of the present invention, which will be described later.
A wiring forming method in a semiconductor device according to a first embodiment of the present invention includes the steps of:
(A) forming at least one wiring and a filling layer filled between the wirings, on a substrate;
(B) forming a gas permeable film on the wiring and the filling layer;
(C) removing the filling layer through the gas permeable film so as to form a gap between the wirings;
(D) filling a gas having a thermal conductivity equal to or higher than three times that of air at 0xc2x0 C. through the gas permeable film into the gap; and
(E) forming a gas impermeable film on the gas permeable film.
In the wiring forming method in the semiconductor device according to the first embodiment of the present invention, the step (A) of forming the wiring and the filling layer filled between the wirings on the substrate can be comprised of, for example, the steps of forming the wiring on the substrate by using the known method; forming the filling layer on the entire surface by using a CVD method, a spin coating method, a sputtering method and the like; and then flattering the filling layer. Alternatively, it can be comprised of the steps of forming the filling layer on the substrate; forming a concave portion (for example, a groove) on the portion of the filling layer on which the wiring is formed; forming a wiring material layer on the entire surface including the concave portion by using an evaporating method, a sputtering method, a CVD method, a plating method and the like; selectively removing the wiring material layer on the filling layer by using a chemically mechanically polishing method (CMP method) and an etching-back method; and thereby filling the wiring material layer into the concave portion, and accordingly obtaining the wiring.
The material constituting the filling layer may be the material that can be removed through the gas permeable film, actually, the material that can be made into gaseous substance by the actions, such as fusion, dissolution, evaporation, vaporization, decomposition, sublimation and the like, or the material that can be etched through the gas permeable film. As such material, ice; alcohol; resist material; carbon; and a so-called foaming material which is used when silica gel or porous silica film is formed can be exemplified.
The wiring forming method in the semiconductor device according to the first embodiment of the present invention can be designed such that the gas permeable film is made of a porous insulation material (for example, an insulation material having a low dielectric constant) and the gas impermeable film can be made of silicon nitride (SiN) or silicon oxide (SiO2). Here, as an example, the insulation material having a low dielectric constant xcexa may include: non-fluorine system polymer, such as BCB (Benzo-Cyclo-Butene: xcexa=2.6), poly-aryl-ether (xcexa=2.6 to 2.8), polyimide (xcexa=2.9) and the like; fluorine system polymer, such as fluorine addition polyimide (xcexa=2.7), tetra-fluoro ethylene (xcexa=2.1 to 1.9), cyclo-perfluoro carbon (xcexa=2.1), poly-aryl-fluoride ether (xcexa=2.6), fluorine addition parylene (xcexa=2.4) and the like; organic SOG (xcexa=2.7); silicon oxide system xerogel (xcexa=2.0); nano-porous silica; and amorphous carbon (xcexa=2.5). The method of forming the gas permeable film may be suitably determined on the basis of the material constituting the gas permeable film. It may include the CVD method, the spin coating method and the sputtering method, as an example. Also, preferably, the gas impermeable film made of the silicon nitride is formed by the plasma CVD method. Moreover, the forming condition having the compression stress is the most effective.
In the wiring forming method in the semiconductor device according to the first embodiment of the present invention, at the step (C), after the filling layer is removed through the gas permeable film, it is preferably set at a state of vacuum (decompression) atmosphere so that the remaining gas remaining in the gap (the gas composed of the material constituting the filling layer, or the decomposition material, the reactant and the like) is removed.
At the step (D) of filling through the gas permeable film into the gap, the highly thermally conductive gas which has a pressure lower than an ambient pressure may be filled, or the highly thermally conductive gas which has a pressure equal to or higher than the ambient pressure may be filled.
A wiring forming method in a semiconductor device according to a second embodiment of the present invention includes the steps of:
(A) forming a plurality of wirings on a substrate; and
(B) forming a gas impermeable film on the wirings and above gaps existing between the wirings, in gas atmosphere having a thermal conductivity equal to or higher than three times that of air at 0xc2x0 C.
In the wiring forming method in the semiconductor device according to the second embodiment of the present invention, preferably, the step (B) of forming the gas impermeable films is actually comprised of the step of laminating the gas impermeable films made of polyimide film on the wiring.
Also, the pressure of the gas atmosphere (the highly thermally conductive gas atmosphere) at the step (B) may be the pressure lower than the ambient pressure or the pressure equal to or higher than the ambient pressure.
A wiring forming method in a semiconductor device according to a third embodiment of the present invention includes the steps of:
(A) forming a plurality of wirings on a substrate;
(B) forming a gas permeable film on the wirings and above gaps existing between the wirings;
(C) filling gas having a thermal conductivity equal to or higher than three times that of air at 0xc2x0 C. through the gas permeable film into the gap; and
(D) forming a gas impermeable film on the gas permeable film.
In the wiring forming method in the semiconductor device according to the third embodiment of the present invention, preferably, the step (B) of forming the gas permeable films is actually comprised of the step of laminating the gas permeable films made of silicon oxide film or low dielectric constant film (the film whose component is a material having a low dielectric constant) on the wiring. Also, the gas impermeable film is preferably composed of silicon nitride (SiN) or silicon oxide (SiO2). By the way, the gas impermeable film made of the silicon nitride is preferably formed by the plasma CVD method. Moreover, the forming condition having the compression stress is the most effective. Depending on a case, preferably, the gas impermeable film is made of polyimide film, and the step (D) of forming the gas impermeable film is comprised of the step of laminating the gas impermeable film made of the polyimide film on the wiring.
Also, at the step (C) of filling the highly thermally conductive gas through the gas permeable film into the gaps, the highly thermally conductive gas atmosphere of the pressure lower than the ambient pressure may be filled or the highly thermally conductive gas of the pressure equal to or higher than the ambient pressure may be filled.
In the semiconductor device of the present invention or the wiring forming method in the semiconductor device according to the first to third embodiments (hereafter, there may be a case that they are collectively referred to as the present invention), preferably, the highly thermally conductive gas is helium gas (a thermal conductivity at 0xc2x0 C.: 14xc3x9710xe2x88x922 W (mxe2x88x921) (Kxe2x88x921) or hydrogen gas (a thermal conductivity at 0xc2x0 C.: 17xc3x9710xe2x88x922 W (mxe2x88x921) (Kxe2x88x921). More preferably, it may be the helium gas. Preferably, the pressure of the highly thermally conductive gas filled in the gaps is 0.5xc3x97105 Pa to 1.5xc3x97105 Pa. More preferably, it is 0.8xc3x97105 Pa to 1.2xc3x97105 Pa. By the way, the gas may be a mixture gas containing the helium gas, a mixture gas containing the hydrogen gas, or a mixture gas containing the helium gas and the hydrogen gas. If such a mixture gas is used, the rate between the helium gas and the hydrogen gas in the mixture gas may be the rate satisfying the requirement that a thermal conductivity of the mixture gas is a thermal conductivity (at 0xc2x0 C.) equal to or higher than three times that of air at 0xc2x0 C. By the way, Ne (a thermal conductivity at 0xc2x0 C. 5xc3x9710xe2x88x922 W (mxe2x88x921) (Kxe2x88x921)) can be exemplified as another gas constituting the mixture gas.
The combination of an insulation layer and a connection hole (a contact hole, a via hole or a through hole) formed between the insulation layers can be exemplified as the substrate in the present invention. Under or below the insulation layer, for example, a transistor device and the like are formed, or a low layer wiring is formed. Or, the combination of the insulation layer and an opening formed on the insulation layer can be exemplified. In this case the wiring material is extended from the wiring into the opening to accordingly form the connection hole. Or, the gas impermeable film can be exemplified as the substrate. In this case, the wiring structure of the semiconductor device in the present invention is formed under the gas impermeable film.
The wiring material constituting the wiring in the present invention may include aluminum, aluminum alloy such as Alxe2x80x94Si, Alxe2x80x94Cu, Alxe2x80x94Sixe2x80x94Cu and the like, metal such as tungsten (W), molybdenum (Mo), Copper (Cu), Gold (Au) and the like, alloys of them, various silicides and poly-silicon having impurities, as an example. The wiring forming method may include a method of patterning after the formation of the wiring material, or a so-called damascene method such as a single damascene method and a dual damascene method.
In the semiconductor device of the present invention, the wiring has a multiple-layer structure. That is, it may have the structure in which a wiring is formed through a plug made of a wiring material on a wiring (a two-layer wiring structure) or the structure in which the above-mentioned structures are repeated (a multiple-layer wiring structure having a multiple-layer of three layers or more), and a gap may exist between those multiple-layer wiring structures. Or, it may be designed such that the wiring structures of the present invention are laminated. In this case, the gas impermeable film, or a lamination structure of the gas permeable film and the gas impermeable film, and an insulation layer as necessary are formed between the upper wiring structure and the lower wiring structure of the present invention. In this case, the wirings in the respective layers are made of the wiring material, and they are connected through the plug formed in a lamination structure of the insulation layer and the gas impermeable film; a lamination structure of the insulation layer and the gas permeable film; a lamination structure of the insulation layer, the gas permeable film and the gas impermeable film; the gas permeable film; the gas impermeable film; or a lamination structure of the gas permeable film and the gas impermeable film.
By the way, if the semiconductor device having the multiple-layer wiring structure is manufactured, in the case of the wiring forming method in the semiconductor device according to the first embodiment of the present invention, the process for carrying out the step (A) and forming an interlayer insulation layer corresponding to the filling layer on the entire surface and then carrying out the step (A) may be repeated for a desired number of times. In the case of the wiring forming method in the semiconductor device according to the second or third embodiment of the present invention, the process for carrying out the step (A) and forming the interlayer insulation layer on the entire surface and then carrying out the step (A) may be repeated for a desired number of times, and after that, the interlayer insulation layer may be removed. By the way, in this case, the interlayer insulation layer may be etched by using the wiring as an etching layer mask.
Also, if the semiconductor device having a construction in which the wiring structures of the present invention are laminated is manufactured, in the case of the wiring forming method in the semiconductor device according to the first embodiment of the present invention, the steps (A) to (E) may be repeated for a desired number of times; or the steps (D), (E) may be carried out after the steps (A) to (C) are repeated for a desired number of times; or the steps (C), (D) and (E) may be carried out after the steps (A), (B) are repeated for a desired number of times. Also, in the case of the wiring forming method in the semiconductor device according to the second embodiment of the present invention, the steps (A), (B) may be repeated for a desired number of times. Moreover, in the case of the wiring forming method in the semiconductor device according to the third embodiment, the steps (A) to (D) may be repeated for a desired number of times; or the steps (C), (D) may be carried out after the steps (A), (B) are repeated for a desired number of times.
In the present invention, the gap between the wirings is filled with the highly thermally conductive gas having the thermal conductivity equal to or higher than three times that of the air at 0xc2x0 C. Thus, it is possible to solve the problem in the conventional technique, such as the poor thermal diffusion in the gap.
The material constituting the typical wiring structure that is not the hollow wiring structure may include, for example, aluminum (a thermal conductivity at 0xc2x0 C.: 233 W (mxe2x88x921) (Kxe2x88x921)), SiO2 (a thermal conductivity at 0xc2x0 C.: 1.4 W (mxe2x88x921) (Kxe2x88x921)) and Si (a thermal conductivity at 0xc2x0 C.: 156 W (mxe2x88x921) (Kxe2x88x921)). From the values of the thermal conductivities of the respective materials, it can be considered that the heat generated within such a semiconductor device is not substantially radiated from a chip surface of the semiconductor device and most of the heat is radiated from the side of the silicon semiconductor substrate. Moreover, there is no large mistake even if it is considered that most of the heat is conducted through the connection hole filled with the metallic wiring material (for example, aluminum) without any intervention of the insulation layer existing between the wirings. Thus, in the case of the hollow wiring structure, there may be no problem at a glance since there is little conductance of the heat through the insulation layer even if the gap is filled with air (a thermal conductivity at 0xc2x0 C.: 2.4xc3x9710xe2x88x922 W (mxe2x88x921) (Kxe2x88x921)) or it is set vacuum.
However, the conductance of the heat through the insulation layer existing between the wirings cannot be ignored from the consideration of the following points. A total area of the connection hole between the upper layer wiring and the lower layer wiring is only 20% of an area occupied by the wirings, even in a case of an installment of a dummy connection hole. Also, an area occupied by the wiring formed on the insulation layer is only about 10% per layer, in the upper layer portion of the multiple-layer wiring. Thus, the total area of the connection hole is only about 2% per layer, in the upper layer portion of the multiple-layer wiring, even in the case of the installation of the dummy connection hole. If a ratio of a calorie radiated through the connection hole to a calorie radiated through the insulation layer existing between the wirings is assumed to be a ratio of a thermal conductivity to an area, the ratio of the calorie radiated through the connection hole to the calorie radiated through the insulation layer existing between the wirings is represented by:
233xc3x970.02:1.4xc3x970.8≈1:0.24xe2x80x83xe2x80x83(1)
Here, if the hollow wiring structure is employed and the insulation layer existing between the wirings is substituted for the gap filled with the air, a ratio of a calorie radiated through the connection hole to a ratio radiated through the gap is represented by:
233xc3x970.02:2.4xc3x9710xe2x88x922xc3x970.8≈1:0.0041xe2x80x83xe2x80x83(2)
On the other hand, if the wiring structure of the present invention is employed and the helium gas is used as the highly thermally conductive gas, the ratio of the calorie radiated through the connection hole to the calorie radiated through the gap is represented by:
233xc3x970.02:14xc3x9710xe2x88x922xc3x970.8≈1:0.024xe2x80x83xe2x80x83(3)
As mentioned above, in the semiconductor device of the present invention or the wiring forming method in the semiconductor device, the higher thermal diffusion even through the gap can be obtained over the conventional hollow wiring structure in which the gap is filled with the air.
In the present invention, the gap placed between the wirings is filled with the highly thermally conductive gas having the thermal conductivity equal to or higher than three times that of the air at 0xc2x0 C. Thus, the high thermal diffusion can be obtained even through the gap, as compared with the conventional hollow wiring structure in which the air is filled in the gap. Moreover, if the helium gas or the hydrogen gas is used as the highly thermally conductive gas, since the dielectric constants xcexa of those gases are very smaller than the dielectric constant of the air, it is possible to attain the further drop in the parasitic capacitance between the wirings. Hence, it is possible to obtain the semiconductor device that has high reliability and also enables high-speed operation.